Add on-the-fly compute support with a transpose engine

[DanielKellerM]

Summary

This PR adds optional on-the-fly compute to the generated iDMA backends: transfers can be transformed while they stream through the DMA, with no extra memory passes. The first (and currently only) compute op is a matrix transpose; the architecture is an extension point for further ops.

The transpose datapath is adapted from the datamover (Ratha) HWPE — imported verbatim from pulp-platform/datamover@d58a985 in the first commit (original authors credited), then reworked to iDMA conventions.

Architecture

opt.compute (request)  →  idma_transpose_midend  →  idma_nd_midend  →  backend
                           (tensor shape → 4-D walk)                     │
                                       write seam: idma_otf_compute ── idma_otf_transpose

• Request model (idma_pkg): opt.compute = {enable, op, params} carried per transfer; transpose params are the element mode (int8/fp16/fp32) and the tensor shape (M, N up to 4095).
• Geometry midend: expands a compact transpose request into the tiled NumDim=4 ND walk (row / row-tile / col-tile) for the unmodified idma_nd_midend; the geometry strength-reduces to shifts except one 12x12 stride product.
• Write-seam dispatcher: idma_otf_compute latches the per-transfer options and selects one op; the AXI write manager gains an external strobe mask plus a strobe-independent beat-done so partial edge tiles drain correctly.
• Engine: NE x NE tile ping-pong (NE = StrbWidth/elem), runtime element size, element-granular edge masking. Steady state 1 + 1/NE cycles per tile (~98% of bus peak at NE=64).

Generation-time configuration

Compute is a generation decision, not an SV parameter: IDMA_VIDMA_IDS entries take variant[:ops][:fd|hd] (default rw_axi = transpose, full duplex). Non-listed variants render without any compute logic. The hd option builds a single tile bank — half the buffer area (StrbWidth^2 bytes per bank, e.g. 4 KiB at 512 bit) for roughly half the streaming rate.

Constraints, enforced at generation/elaboration time: compute variants need a single AXI write port and NO_ERROR_HANDLING; sources/destinations must be readable/writable up to the tile-padded bounds (documented contract; writes are strobe-masked, reads are not).

Verification

• Standalone engine regression against a DPI-C golden model, in both duplex modes
• Multi-tile aligned + edge ND transposes through the generated rw_axi backend, back-to-back geometry-leak checks, an nd_midend burst-address regression and a field-for-field midend unit test
• Non-compute variants regenerate logic-identical to the base branch

[Copilot]

Pull request overview

This PR adds optional on-the-fly compute support to generated iDMA backends by introducing a transpose operation that is dispatched at the AXI write seam and carried per-transfer via new opt.compute request fields. It extends the generator to selectively include compute logic per backend variant, adds a transpose-geometry midend, updates write masking/beat retirement for edge tiles, and provides multiple new regressions (engine-only, ND end-to-end, and back-to-back).

Changes:

• Extend request/options types with compute_options_t and add generator plumbing to enable compute per backend variant (--compute-ids / IDMA_VIDMA_IDS).
• Add transpose datapath blocks (idma_otf_compute, idma_otf_transpose) and integrate them into the transport write seam, including strobe-mask support and strobe-independent beat retirement in idma_axi_write.
• Add transpose geometry expander midend plus new directed/unit testbenches and a DPI-C golden model.

Reviewed changes

Copilot reviewed 27 out of 28 changed files in this pull request and generated 3 comments.

Show a summary per file

File	Description
util/mario/util.py	Adds parsing for compute-enabled backend variant IDs (--compute-ids).
util/mario/transport_layer.py	Threads compute configuration into transport-layer template context.
util/mario/legalizer.py	Threads compute enable into legalizer template context.
util/mario/backend.py	Enforces compute placement constraints (single AXI write port) and passes op set into backend template context.
util/gen_idma.py	Adds --compute-ids CLI support and forwards compute configuration into renderers.
src/include/idma/typedef.svh	Extends options_t with compute field to carry per-transfer compute config.
src/idma_pkg.sv	Introduces compute op enums and packed option/enable types for on-the-fly compute.
src/midend/idma_transpose_midend.sv	New midend that expands transpose requests into a NumDim=4 tiled ND walk.
src/midend/idma_nd_midend.sv	Adds a simulation-time stride/address width consistency assert.
src/backend/idma_otf_compute.sv	New write-seam dispatcher that latches per-transfer compute options and selects the active engine.
src/backend/idma_otf_transpose.sv	New transpose engine (tile ping-pong) with edge masking.
src/backend/idma_axi_write.sv	Adds external strobe mask input and strobe-independent beat-done output for correct draining of masked beats.
src/db/idma_axi.yml	Wires compute into write datapath request and connects new idma_axi_write ports.
src/db/idma_tilelink.yml	Forwards compute into write datapath request struct literal.
src/backend/tpl/idma_transport_layer.sv.tpl	Integrates compute at the write seam and carries shifted external mask to the write manager.
src/backend/tpl/idma_legalizer.sv.tpl	Forces decouple signals when compute is enabled and forwards opt.compute through mutable options.
src/backend/tpl/idma_backend.sv.tpl	Adds compute fields to datapath request structs and increases meta FIFO depth for compute latency.
test/idma_test.sv	Extends test driver task to optionally enable/parameterize transpose per transfer.
test/idma_transpose_dpi.c	Adds DPI-C golden transpose model for standalone engine verification.
test/tb_idma_otf_transpose.sv	New standalone transpose-engine self-checking regression using DPI golden.
test/tb_idma_transpose_nd.sv	New end-to-end ND→backend transpose regression with edge/padding checks.
test/tb_idma_transpose_b2b.sv	New end-to-end back-to-back transpose regression to catch stale per-transfer state.
test/midend/tb_idma_transpose_midend.sv	Unit test verifying transpose midend geometry expansion and passthrough behavior.
test/midend/tb_idma_nd_midend_b2b.sv	Back-to-back ND midend regression under backpressure to catch base-address reuse.
doc/transpose-engine-routing-plan.md	Detailed routing/signaling design doc for transpose integration.
idma.mk	Adds compute-ids generation hook, split-RTL sim flow tag, and new Questa/VSIM targets for transpose regressions.
Bender.yml	Adds new RTL sources and introduces a split_rtl target flow for per-variant generated files and transpose tests.
jobs/backend_rw_axi/transpose_none.txt	Adds a placeholder job file for the rw_axi backend.

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[DanielKellerM]

to fix

[DanielKellerM]

FYI @FrancescoConti - the long-promised feature :)