fix archi/hyper: correct Siracusa channel offset#169
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…in-bounds The Hyper register size on Siracusa is 0x100 (0x1A10_2280-0x1A10_2380). With HYPER_NB_CHANNELS=2 and a 0x80 channel offset, HYPER_COMMON_REGS_OFFSET resolved to 0x100, placing every common register at the end of the memory space. Each channel only uses HYPER_NB_CONFIG_REGS=16 (0x40), so use a 0x40 offset: channels at 0x00/0x40, common block at 0x80, all within 0x100. Verified with siracusa evb.
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Hello, while working with HyperRAM on Siracusa I noticed the common registers land outside the Hyper memory space. The size is 0x100 (0x1A10_2280–0x1A10_2380), but with HYPER_NB_CHANNELS=2 and a 0x80 channel offset, HYPER_COMMON_REGS_OFFSET comes out to 0x100, so it points past the end into the uDMA Filter region.
I believe each channel only uses 16 config regs (0x40), so I dropped the offset to 0x40: channels land at 0x00/0x40 and the common block at 0x80, all inside 0x100. Confirmed on our evb probing Test Point 3, the CS addressing only lined up once the stride was 0x40.
Not sure if the fix is the best option or intended code definitions, so I'm flagging it for review rather than assuming. Happy to adjust.