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Support systems with 128-bit pointers.#19

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brooksdavis wants to merge 1 commit into
eembc:128b-pointerfrom
CTSRD-CHERI:128-bit-pointers
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Support systems with 128-bit pointers.#19
brooksdavis wants to merge 1 commit into
eembc:128b-pointerfrom
CTSRD-CHERI:128-bit-pointers

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@brooksdavis
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In order to allow meaningful comparisons between 32- and 64-bit systems,
core_list_init hardcodes the size of pointers to be 8 bytes. This
controls the number list elements allocated for a buffer of a given
size. On a system with 128-bit pointers this results in data corruption
as the list data is written over list_head objects.

Address this by adding a POINTER_SPACE define which can be changed to
16. Update the checksums in the known_crc arrays for the run1.log and
run2.log cases.

In order to allow meaningful comparisons between 32- and 64-bit systems,
core_list_init hardcodes the size of pointers to be 8 bytes.  This
controls the number list elements allocated for a buffer of a given
size.  On a system with 128-bit pointers this results in data corruption
as the list data is written over list_head objects.

Address this by adding a POINTER_SPACE define which can be changed to
16.  Update the checksums in the known_crc arrays for the run1.log and
run2.log cases.
@brooksdavis
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I don't necessarily expect this to be merged as is, but I'd like to start a discussion about how to support systems with 128-bit pointers. Our processors (http://chericpu.org) have 128-bit pointers. We have a variant for MIPS, we're working on one for RISC-V, and we've been working with Arm (who will be producing the Morello prototype architecture over the next couple years https://www.cl.cam.ac.uk/research/security/ctsrd/cheri/cheri-morello.html).

@petertorelli petertorelli added the enhancement New feature or request label Jan 20, 2020
Base automatically changed from master to main March 5, 2021 18:43
@petertorelli petertorelli changed the base branch from main to 128b-pointer March 11, 2021 18:44
@joseph-yiu
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joseph-yiu commented May 28, 2026

Hi there,

Possibly a daft question here ;-)
I wonder if the change proposed in core_main.c might have an issue:
What is the pointer size in a 32-bit system with Cheri? Will it have 64-bit pointer, same size as a pointer in 64-bit system without Cheri? But the CRC would be different? If so we might need other preprocessing macro to help identifying the system's details.

Update: Answering my own question. Pointer size is still 128-bit in 32-bit systems with Cheri.

Note: Instead of defining POINTER_SPACE, maybe __SIZEOF_POINTER__ could be used instead.

regards,
Joseph

@brooksdavis
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Hi there,

Possibly a daft question here ;-)
I wonder if the change proposed in core_main.c might have an issue:
What is the pointer size in a 32-bit system with Cheri? Will it have 64-bit pointer, same size as a pointer in 64-bit system without Cheri? But the CRC would be different? If so we might need other preprocessing macro to help identifying the system's details.

Update: Answering my own question. Pointer size is still 128-bit in 32-bit systems with Cheri.

CHERI Pointers on 32-bit systems are generally 64-bit.

@joseph-yiu
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Ah, thanks @brooksdavis
In that case we need a different C macro to tell them apart.
According to google it seems __CHERI__ is a suitable macro for determining if Cheri is used.
Also __CHERI_CAPABILITY_WIDTH__ can be used to determine the size (but I am not familiar with Cheri, so I might be wrong here).
regards,
Joseph

@brooksdavis
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__SIZEOF_POINTER__ could probably be used by default rather then requiring an external define, but you'd end up wanting to declare something like POINTER_SPACE due to the trick of allocating the same amount of space for pointer pairs on 32 and 64-bit systems in order to make the amount of work done comparable. You'd also want the ability to override the size so you can compare 64-bit and CHERI or RV128 system.

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3 participants