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No model mapping for st,stm32-fdcan (STM32H5/G4/L5/U5 CAN missing entirely) #12

Description

@devitwise

Verified against: dts2repl commit c2aae3dd278f318900ba4af8cab7ad338b50e0df (current main as of writing).

Devicetree compatible: st,stm32-fdcan

What is emitted: Nothing. dts2repl/models.json has no entry for st,stm32-fdcan, so any node with this compatible produces a bare Tag in the generated .repl instead of a peripheral. This affects every STM32 SoC whose CAN controller uses the reduced FDCAN peripheral, e.g. STM32H5, G4, L5, U5. Confirmed on STM32H5F5 (board stm32h5f5j_dk, Zephyr v4.4.1).

What should be emitted: CAN.STM32_FDCAN. Renode already ships this model. A working example is present in Renode's own bundled platform description, platforms/cpus/stm32l552.repl, lines 123-130:

fdcan1: CAN.STM32_FDCAN @ sysbus 0x4000A400
    series: .L5
    messageRam: fdcanRAM
    Int0 -> nvic@39
    Int1 -> nvic@40

Notes for a fix:

  • The model requires a series enum parameter (matching the SoC family: L5, H5, G4, U5, …) and a messageRam reference to a separate memory region node. Whatever parameterization mechanism models.json already uses for other multi-parameter models would need to supply both.
  • The devicetree node's bosch,mram-cfg property carries the message-RAM layout (offsets/counts for the various FIFO/buffer regions), which is what messageRam needs to be derived from or sized against.
  • Without this mapping, boards using st,stm32-fdcan get no CAN peripheral at all in the generated platform, with no error — the interface is just silently absent.

Renode version used to confirm the bundled model exists: 1.16.1+20260623git3f5a91013.

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