From 87a3b8fcd7a52dec4322c7df297cff079a3e8143 Mon Sep 17 00:00:00 2001 From: CYFS <2805686936@qq.com> Date: Thu, 9 Jul 2026 10:58:30 +0800 Subject: [PATCH] bsp: fix ra8p1 titan board keil build --- .../ra8p1-titan-board/board/bsp_linker_info.h | 26 + bsp/renesas/ra8p1-titan-board/board/ra8_it.c | 77 + bsp/renesas/ra8p1-titan-board/project.uvprojx | 1428 ++++++++++++++--- .../bsp/cmsis/Device/RENESAS/Source/startup.c | 2 +- bsp/renesas/ra8p1-titan-board/script/fsp.scat | 57 +- .../ra8p1-titan-board/template.uvprojx | 2 +- 6 files changed, 1342 insertions(+), 250 deletions(-) diff --git a/bsp/renesas/ra8p1-titan-board/board/bsp_linker_info.h b/bsp/renesas/ra8p1-titan-board/board/bsp_linker_info.h index 8283504de53..e49a74df0b2 100644 --- a/bsp/renesas/ra8p1-titan-board/board/bsp_linker_info.h +++ b/bsp/renesas/ra8p1-titan-board/board/bsp_linker_info.h @@ -135,6 +135,32 @@ extern bsp_init_info_t const g_init_info; * Objects allocated by bsp_linker.c **********************************************************************************************************************/ /* DDSC symbol definitions */ +#if defined(__ARMCC_VERSION) +#define __sdram_from_ospi0_cs1$$Load Load$$__sdram_from_ospi0_cs1$$Base +#define __sdram_from_ospi1_cs1$$Load Load$$__sdram_from_ospi1_cs1$$Base +#define __sdram_from_data_flash$$Load Load$$__sdram_from_data_flash$$Base +#define __sdram_from_flash$$Load Load$$__sdram_from_flash$$Base +#define __ospi0_cs0_from_ospi0_cs1$$Load Load$$__ospi0_cs0_from_ospi0_cs1$$Base +#define __ospi0_cs0_from_ospi1_cs1$$Load Load$$__ospi0_cs0_from_ospi1_cs1$$Base +#define __ospi0_cs0_from_data_flash$$Load Load$$__ospi0_cs0_from_data_flash$$Base +#define __ospi0_cs0_from_flash$$Load Load$$__ospi0_cs0_from_flash$$Base +#define __ospi1_cs0_from_ospi0_cs1$$Load Load$$__ospi1_cs0_from_ospi0_cs1$$Base +#define __ospi1_cs0_from_ospi1_cs1$$Load Load$$__ospi1_cs0_from_ospi1_cs1$$Base +#define __ospi1_cs0_from_data_flash$$Load Load$$__ospi1_cs0_from_data_flash$$Base +#define __ospi1_cs0_from_flash$$Load Load$$__ospi1_cs0_from_flash$$Base +#define __itcm_from_ospi0_cs1$$Load Load$$__itcm_from_ospi0_cs1$$Base +#define __itcm_from_ospi1_cs1$$Load Load$$__itcm_from_ospi1_cs1$$Base +#define __itcm_from_data_flash$$Load Load$$__itcm_from_data_flash$$Base +#define __itcm_from_flash$$Load Load$$__itcm_from_flash$$Base +#define __dtcm_from_ospi0_cs1$$Load Load$$__dtcm_from_ospi0_cs1$$Base +#define __dtcm_from_ospi1_cs1$$Load Load$$__dtcm_from_ospi1_cs1$$Base +#define __dtcm_from_data_flash$$Load Load$$__dtcm_from_data_flash$$Base +#define __dtcm_from_flash$$Load Load$$__dtcm_from_flash$$Base +#define __ram_from_ospi0_cs1$$Load Load$$__ram_from_ospi0_cs1$$Base +#define __ram_from_ospi1_cs1$$Load Load$$__ram_from_ospi1_cs1$$Base +#define __ram_from_data_flash$$Load Load$$__ram_from_data_flash$$Base +#define __ram_from_flash$$Load Load$$__ram_from_flash$$Base +#endif /* Zero initialization tables */ extern uint32_t __sdram_zero_nocache$$Base; extern uint32_t __sdram_zero_nocache$$Limit; diff --git a/bsp/renesas/ra8p1-titan-board/board/ra8_it.c b/bsp/renesas/ra8p1-titan-board/board/ra8_it.c index e574ed7c3bd..20f76d84f58 100644 --- a/bsp/renesas/ra8p1-titan-board/board/ra8_it.c +++ b/bsp/renesas/ra8p1-titan-board/board/ra8_it.c @@ -1,3 +1,80 @@ #include #include "hal_data.h" +rt_weak void user_uart0_callback(uart_callback_args_t *p_args) +{ + FSP_PARAMETER_NOT_USED(p_args); +} + +rt_weak void spi0_callback(spi_callback_args_t *p_args) +{ + FSP_PARAMETER_NOT_USED(p_args); +} + +rt_weak void i2c_master_callback(i2c_master_callback_args_t *p_args) +{ + FSP_PARAMETER_NOT_USED(p_args); +} + +rt_weak void rtc_callback(rtc_callback_args_t *p_args) +{ + FSP_PARAMETER_NOT_USED(p_args); +} + +rt_weak void sdhi0_callback(sdmmc_callback_args_t *p_args) +{ + FSP_PARAMETER_NOT_USED(p_args); +} + +rt_weak void canfd0_callback(can_callback_args_t *p_args) +{ + FSP_PARAMETER_NOT_USED(p_args); +} + +rt_weak void timer0_callback(timer_callback_args_t *p_args) +{ + FSP_PARAMETER_NOT_USED(p_args); +} + +rt_weak void user_ether0_callback(ether_callback_args_t *p_args) +{ + FSP_PARAMETER_NOT_USED(p_args); +} + +rt_weak void rmac_phy_target_rtl8211_initialize(rmac_phy_instance_ctrl_t *p_instance_ctrl) +{ + FSP_PARAMETER_NOT_USED(p_instance_ctrl); +} + +rt_weak bool rmac_phy_target_rtl8211_is_support_link_partner_ability(rmac_phy_instance_ctrl_t *p_instance_ctrl, + uint32_t line_speed_duplex) +{ + FSP_PARAMETER_NOT_USED(p_instance_ctrl); + FSP_PARAMETER_NOT_USED(line_speed_duplex); + + return true; +} + +rt_weak const canfd_afl_entry_t p_canfd0_afl[CANFD_CFG_AFL_CH0_RULE_NUM] = {0}; + +rt_weak ospi_b_xspi_command_set_t g_hyper_ram_commands[] = +{ + { + .protocol = SPI_FLASH_PROTOCOL_8D_8D_8D, + .frame_format = OSPI_B_FRAME_FORMAT_XSPI_PROFILE_2_EXTENDED, + .latency_mode = OSPI_B_LATENCY_MODE_FIXED, + .command_bytes = OSPI_B_COMMAND_BYTES_1, + .address_bytes = SPI_FLASH_ADDRESS_BYTES_4, + + .read_command = 0xA0, + .read_dummy_cycles = 11, + .program_command = 0x20, + .program_dummy_cycles = 11, + + .address_msb_mask = 0xF0, + .status_needs_address = false, + + .p_erase_commands = RT_NULL, + } +}; + diff --git a/bsp/renesas/ra8p1-titan-board/project.uvprojx b/bsp/renesas/ra8p1-titan-board/project.uvprojx index f6cfee7042a..cdd2eca8b8c 100644 --- a/bsp/renesas/ra8p1-titan-board/project.uvprojx +++ b/bsp/renesas/ra8p1-titan-board/project.uvprojx @@ -1,43 +1,46 @@ + 2.1 +
### uVision Project, (C) Keil Software
+ Target_1 0x4 ARM-ADS - 6190000::V6.19::ARMCLANG + 6240000::V6.24::ARMCLANG 1 R7KA8P1KF:CPU0 Renesas - Renesas.RA_DFP.6.1.0 + Renesas.RA_DFP.6.5.1 https://www2.renesas.eu/Keil_MDK_Packs/ CPUTYPE("Cortex-M85") DSP TZ MVE(FP) FPU3(DFPU) PACBTI CLOCK(12000000) ELITTLE - - - + + + 0 - - - - - - - - - - + + + + + + + + + + $$Device:R7KA8P1KF$SVD\R7KA8P1AD.svd 0 0 - - - - - + + + + + 0 0 @@ -59,8 +62,8 @@ 0 0 - - + + 0 0 0 @@ -69,8 +72,8 @@ 0 0 - - + + 0 0 2 @@ -79,15 +82,15 @@ 0 0 - - + + 0 0 2 0 0 - + 0 @@ -101,8 +104,8 @@ 0 0 3 - - + + 1 @@ -134,12 +137,12 @@ -1 1 - + "" () - - - - + + + + 0 @@ -172,7 +175,7 @@ 0 0 "Cortex-M85" - + 0 0 0 @@ -307,7 +310,7 @@ 0x0 - + 1 @@ -334,9 +337,9 @@ 0 0 - + __STDC_LIMIT_MACROS, __RTTHREAD__, _RA_CORE=0, RT_USING_ARMLIBC, RT_USING_LIBC, __CLK_TCK=RT_TICK_PER_SECOND - + ..\..\..\components\libc\posix\io\poll;..\..\..\components\drivers\phy;..\..\..\components\drivers\smp_call;..\..\..\include;..\libraries\HAL_Drivers\drivers;..\..\..\components\drivers\include;board\ports;..\..\..\components\drivers\include;ra\fsp\src\r_vin;ra\fsp\inc\api;..\..\..\libcpu\arm\cortex-m85;ra_gen;..\libraries\HAL_Drivers;board;..\..\..\components\drivers\include;..\..\..\components\drivers\include;ra\fsp\inc;..\..\..\components\libc\posix\io\eventfd;ra_cfg\fsp_cfg\bsp;..\..\..\libcpu\arm\common;..\..\..\components\libc\compilers\common\extension\fcntl\octal;ra\fsp\src\rm_ethosu;ra\npu\ethos-u-core-driver\include;ra\tes\dave2d\inc;..\..\..\components\finsh;ra\fsp\src\r_mipi_csi;ra_cfg\fsp_cfg;..\..\..\components\libc\compilers\common\extension;..\..\..\components\drivers\include;..\libraries\HAL_Drivers\drivers\config;..\..\..\components\libc\posix\io\epoll;ra\arm\CMSIS_6\CMSIS\Core\Include;..\..\..\components\drivers\include;.;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\posix\ipc;..\..\..\components\drivers\include;..\..\..\components\net\utest;ra\fsp\inc\instances @@ -352,10 +355,10 @@ 0 2 - - - - + + + + @@ -365,15 +368,15 @@ 0 0 0 - - - + + + .\script\fsp.scat - - - - - + + + + + 6319,6314 @@ -396,29 +399,21 @@ 1 ..\..\..\libcpu\arm\common\atomic_arm.c - - div0.c 1 ..\..\..\libcpu\arm\common\div0.c - - showmem.c 1 ..\..\..\libcpu\arm\common\showmem.c - - context_gcc.S 2 ..\..\..\libcpu\arm\cortex-m85\context_gcc.S - - cpuport.c 1 @@ -434,241 +429,724 @@ 1 ..\..\..\components\drivers\core\device.c + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 __RT_IPC_SOURCE__ - + - - completion_comm.c 1 ..\..\..\components\drivers\ipc\completion_comm.c + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 __RT_IPC_SOURCE__ - + - - completion_up.c 1 ..\..\..\components\drivers\ipc\completion_up.c + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 __RT_IPC_SOURCE__ - + - - condvar.c 1 ..\..\..\components\drivers\ipc\condvar.c + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 __RT_IPC_SOURCE__ - + - - dataqueue.c 1 ..\..\..\components\drivers\ipc\dataqueue.c + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 __RT_IPC_SOURCE__ - + - - pipe.c 1 ..\..\..\components\drivers\ipc\pipe.c + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 __RT_IPC_SOURCE__ - + - - ringblk_buf.c 1 ..\..\..\components\drivers\ipc\ringblk_buf.c + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 __RT_IPC_SOURCE__ - + - - ringbuffer.c 1 ..\..\..\components\drivers\ipc\ringbuffer.c + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 __RT_IPC_SOURCE__ - + - - waitqueue.c 1 ..\..\..\components\drivers\ipc\waitqueue.c + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 __RT_IPC_SOURCE__ - + - - workqueue.c 1 ..\..\..\components\drivers\ipc\workqueue.c + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 __RT_IPC_SOURCE__ - + - - mtd_nor.c 1 ..\..\..\components\drivers\mtd\mtd_nor.c + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 __RT_IPC_SOURCE__ - + - - dev_pin.c 1 ..\..\..\components\drivers\pin\dev_pin.c + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 __RT_IPC_SOURCE__ - + - - dev_serial_v2.c 1 ..\..\..\components\drivers\serial\dev_serial_v2.c + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 __RT_IPC_SOURCE__ - + @@ -684,22 +1162,16 @@ 1 board\ra8_it.c - - drv_gpio.c 1 ..\libraries\HAL_Drivers\drivers\drv_gpio.c - - drv_usart_v2.c 1 ..\libraries\HAL_Drivers\drivers\drv_usart_v2.c - - drv_common.c 1 @@ -715,22 +1187,16 @@ 1 ..\..\..\components\finsh\shell.c - - msh.c 1 ..\..\..\components\finsh\msh.c - - msh_parse.c 1 ..\..\..\components\finsh\msh_parse.c - - cmd.c 1 @@ -746,279 +1212,836 @@ 1 ..\..\..\src\clock.c + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 __RT_KERNEL_SOURCE__ - + - - components.c 1 ..\..\..\src\components.c + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 __RT_KERNEL_SOURCE__ - + - - cpu_up.c 1 ..\..\..\src\cpu_up.c + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 __RT_KERNEL_SOURCE__ - + - - defunct.c 1 ..\..\..\src\defunct.c + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 __RT_KERNEL_SOURCE__ - + - - idle.c 1 ..\..\..\src\idle.c + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 __RT_KERNEL_SOURCE__ - + - - ipc.c 1 ..\..\..\src\ipc.c + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 __RT_KERNEL_SOURCE__ - + - - irq.c 1 ..\..\..\src\irq.c + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 __RT_KERNEL_SOURCE__ - + - - kservice.c 1 ..\..\..\src\kservice.c + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 __RT_KERNEL_SOURCE__ - + - - memheap.c 1 ..\..\..\src\memheap.c + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 __RT_KERNEL_SOURCE__ - + - - mempool.c 1 ..\..\..\src\mempool.c + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 __RT_KERNEL_SOURCE__ - + - - object.c 1 ..\..\..\src\object.c + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 __RT_KERNEL_SOURCE__ - + - - scheduler_comm.c 1 ..\..\..\src\scheduler_comm.c + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 __RT_KERNEL_SOURCE__ - + - - scheduler_up.c 1 ..\..\..\src\scheduler_up.c + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 __RT_KERNEL_SOURCE__ - + - - thread.c 1 ..\..\..\src\thread.c + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 __RT_KERNEL_SOURCE__ - + - - timer.c 1 ..\..\..\src\timer.c + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 __RT_KERNEL_SOURCE__ - + @@ -1034,85 +2057,61 @@ 1 ..\..\..\components\libc\compilers\armlibc\syscall_mem.c - - syscalls.c 1 ..\..\..\components\libc\compilers\armlibc\syscalls.c - - cctype.c 1 ..\..\..\components\libc\compilers\common\cctype.c - - cstdlib.c 1 ..\..\..\components\libc\compilers\common\cstdlib.c - - cstring.c 1 ..\..\..\components\libc\compilers\common\cstring.c - - ctime.c 1 ..\..\..\components\libc\compilers\common\ctime.c - - cunistd.c 1 ..\..\..\components\libc\compilers\common\cunistd.c - - cwchar.c 1 ..\..\..\components\libc\compilers\common\cwchar.c - - kerrno.c 1 ..\..\..\src\klibc\kerrno.c - - kstdio.c 1 ..\..\..\src\klibc\kstdio.c - - kstring.c 1 ..\..\..\src\klibc\kstring.c - - rt_vsnprintf_tiny.c 1 ..\..\..\src\klibc\rt_vsnprintf_tiny.c - - rt_vsscanf.c 1 @@ -1128,211 +2127,151 @@ 1 ra\fsp\src\bsp\mcu\all\bsp_clocks.c - - bsp_common.c 1 ra\fsp\src\bsp\mcu\all\bsp_common.c - - bsp_delay.c 1 ra\fsp\src\bsp\mcu\all\bsp_delay.c - - bsp_group_irq.c 1 ra\fsp\src\bsp\mcu\all\bsp_group_irq.c - - bsp_guard.c 1 ra\fsp\src\bsp\mcu\all\bsp_guard.c - - bsp_io.c 1 ra\fsp\src\bsp\mcu\all\bsp_io.c - - bsp_ipc.c 1 ra\fsp\src\bsp\mcu\all\bsp_ipc.c - - bsp_irq.c 1 ra\fsp\src\bsp\mcu\all\bsp_irq.c - - bsp_macl.c 1 ra\fsp\src\bsp\mcu\all\bsp_macl.c - - bsp_ospi_b.c 1 ra\fsp\src\bsp\mcu\all\bsp_ospi_b.c - - bsp_register_protection.c 1 ra\fsp\src\bsp\mcu\all\bsp_register_protection.c - - bsp_sbrk.c 1 ra\fsp\src\bsp\mcu\all\bsp_sbrk.c - - bsp_sdram.c 1 ra\fsp\src\bsp\mcu\all\bsp_sdram.c - - bsp_security.c 1 ra\fsp\src\bsp\mcu\all\bsp_security.c - - bsp_linker.c 1 ra\fsp\src\bsp\mcu\ra8p1\bsp_linker.c - - system.c 1 ra\fsp\src\bsp\cmsis\Device\RENESAS\Source\system.c - - startup.c 1 ra\fsp\src\bsp\cmsis\Device\RENESAS\Source\startup.c - - r_adc_b.c 1 ra\fsp\src\r_adc_b\r_adc_b.c - - r_canfd.c 1 ra\fsp\src\r_canfd\r_canfd.c - - r_dmac.c 1 ra\fsp\src\r_dmac\r_dmac.c - - r_gpt.c 1 ra\fsp\src\r_gpt\r_gpt.c - - r_iic_master.c 1 ra\fsp\src\r_iic_master\r_iic_master.c - - r_ioport.c 1 ra\fsp\src\r_ioport\r_ioport.c - - r_layer3_switch.c 1 ra\fsp\src\r_layer3_switch\r_layer3_switch.c - - r_ospi_b.c 1 ra\fsp\src\r_ospi_b\r_ospi_b.c - - r_rmac.c 1 ra\fsp\src\r_rmac\r_rmac.c - - r_rmac_phy.c 1 ra\fsp\src\r_rmac_phy\r_rmac_phy.c - - r_rtc.c 1 ra\fsp\src\r_rtc\r_rtc.c - - r_sci_b_uart.c 1 ra\fsp\src\r_sci_b_uart\r_sci_b_uart.c - - r_sdhi.c 1 ra\fsp\src\r_sdhi\r_sdhi.c - - r_spi_b.c 1 @@ -1348,29 +2287,21 @@ 1 ra_gen\common_data.c - - hal_data.c 1 ra_gen\hal_data.c - - main.c 1 ra_gen\main.c - - pin_data.c 1 ra_gen\pin_data.c - - vector_data.c 1 @@ -1378,19 +2309,24 @@ + + ::Flex Software + + - + - + - + - + + diff --git a/bsp/renesas/ra8p1-titan-board/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c b/bsp/renesas/ra8p1-titan-board/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c index a6b692dd381..6877f953fcd 100644 --- a/bsp/renesas/ra8p1-titan-board/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c +++ b/bsp/renesas/ra8p1-titan-board/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c @@ -50,7 +50,7 @@ void Reset_Handler (void) SystemInit(); /* Call user application. */ -#if defined(__GNUC__) +#if defined(__GNUC__) && !defined(__ARMCC_VERSION) extern int entry(void); entry(); #elif defined(__ICCARM__) diff --git a/bsp/renesas/ra8p1-titan-board/script/fsp.scat b/bsp/renesas/ra8p1-titan-board/script/fsp.scat index e8eea5ca22c..5c4fa231f21 100644 --- a/bsp/renesas/ra8p1-titan-board/script/fsp.scat +++ b/bsp/renesas/ra8p1-titan-board/script/fsp.scat @@ -1,7 +1,7 @@ -#! armclang -mcpu=cortex-m4 --target=arm-arm-none-eabi -E -x c -I. +#! armclang -mcpu=cortex-m85 --target=arm-arm-none-eabi -E -x c -I. /* generated memory regions file - do not edit */ #define RAM_START 0x22000000 - #define RAM_LENGTH 0x001d4000 + #define RAM_LENGTH 0x00174000 #define FLASH_START 0x02000000 #define FLASH_LENGTH 0x00100000 #define DATA_FLASH_START 0x27000000 @@ -142,6 +142,7 @@ LOAD_REGION_OSPI0_CS1 OSPI0_CS1_START NOCOMPRESS OSPI0_CS1_LENGTH __ram_dtc_vector +0 UNINIT { + *(.fsp_dtc_vector_table) *(.bss.fsp_dtc_vector_table) } @@ -170,6 +171,7 @@ LOAD_REGION_OSPI0_CS1 OSPI0_CS1_START NOCOMPRESS OSPI0_CS1_LENGTH __ospi0_cs1_noinit +0 FIXED UNINIT { ; section.ospi0_cs1.noinit + *(.ospi0_cs1_noinit) *(.bss.ospi0_cs1_noinit) } @@ -265,6 +267,7 @@ LOAD_REGION_OSPI1_CS1 OSPI1_CS1_START NOCOMPRESS OSPI1_CS1_LENGTH __ospi1_cs1_noinit +0 FIXED UNINIT { ; section.ospi1_cs1.noinit + *(.ospi1_cs1_noinit) *(.bss.ospi1_cs1_noinit) } @@ -360,6 +363,7 @@ LOAD_REGION_DATA_FLASH DATA_FLASH_START NOCOMPRESS DATA_FLASH_LENGTH __data_flash_noinit +0 FIXED UNINIT { ; section.data_flash.noinit + *(.data_flash_noinit) *(.bss.data_flash_noinit) } @@ -394,11 +398,37 @@ LOAD_REGION_FLASH FLASH_START NOCOMPRESS FLASH_LENGTH *(.application_vectors) } + FSymTab +0 FIXED + { + *(FSymTab) + } + + VSymTab +0 FIXED + { + *(VSymTab) + } + + UtestTcTab +0 FIXED + { + *(UtestTcTab) + } + + RTInitTab +0 FIXED + { + *(.rti_fn*) + } + + FalPartTable +0 FIXED + { + *(FalPartTable) + } + __flash_noinit +0 FIXED UNINIT { ; section.flash.noinit + *(.flash_noinit) *(.bss.flash_noinit) } __sdram_from_data_flash_jump ImageLimit(__sdram_from_data_flash) EMPTY 0 {} @@ -415,6 +445,7 @@ LOAD_REGION_FLASH FLASH_START NOCOMPRESS FLASH_LENGTH __sdram_noinit_nocache AlignExpr(+0, 32) UNINIT { ; section.sdram.noinit_nocache + *(.sdram_noinit_nocache) *(.bss.sdram_noinit_nocache) } @@ -422,6 +453,7 @@ LOAD_REGION_FLASH FLASH_START NOCOMPRESS FLASH_LENGTH __sdram_zero_nocache +0 { ; section.sdram.zero_nocache + *(.sdram_nocache) *(.bss.sdram_nocache) } ; Execution region required to end align __sdram_zero_nocache on ac6 @@ -431,6 +463,7 @@ LOAD_REGION_FLASH FLASH_START NOCOMPRESS FLASH_LENGTH __sdram_noinit +0 UNINIT { ; section.sdram.noinit + *(.sdram_noinit) *(.bss.sdram_noinit) } @@ -438,6 +471,7 @@ LOAD_REGION_FLASH FLASH_START NOCOMPRESS FLASH_LENGTH __sdram_zero +0 { ; section.sdram.zero + *(.sdram) *(.bss.sdram) } @@ -463,6 +497,7 @@ LOAD_REGION_FLASH FLASH_START NOCOMPRESS FLASH_LENGTH __ospi0_cs0_noinit_nocache AlignExpr(+0, 32) UNINIT { ; section.ospi0_cs0.noinit_nocache + *(.ospi0_cs0_noinit_nocache) *(.bss.ospi0_cs0_noinit_nocache) } @@ -470,6 +505,7 @@ LOAD_REGION_FLASH FLASH_START NOCOMPRESS FLASH_LENGTH __ospi0_cs0_zero_nocache +0 { ; section.ospi0_cs0.zero_nocache + *(.ospi0_cs0_nocache) *(.bss.ospi0_cs0_nocache) } ; Execution region required to end align __ospi0_cs0_zero_nocache on ac6 @@ -479,6 +515,7 @@ LOAD_REGION_FLASH FLASH_START NOCOMPRESS FLASH_LENGTH __ospi0_cs0_noinit +0 UNINIT { ; section.ospi0_cs0.noinit + *(.ospi0_cs0_noinit) *(.bss.ospi0_cs0_noinit) } @@ -486,6 +523,7 @@ LOAD_REGION_FLASH FLASH_START NOCOMPRESS FLASH_LENGTH __ospi0_cs0_zero +0 { ; section.ospi0_cs0.zero + *(.ospi0_cs0) *(.bss.ospi0_cs0) } @@ -511,6 +549,7 @@ LOAD_REGION_FLASH FLASH_START NOCOMPRESS FLASH_LENGTH __ospi1_cs0_noinit_nocache AlignExpr(+0, 32) UNINIT { ; section.ospi1_cs0.noinit_nocache + *(.ospi1_cs0_noinit_nocache) *(.bss.ospi1_cs0_noinit_nocache) } @@ -518,6 +557,7 @@ LOAD_REGION_FLASH FLASH_START NOCOMPRESS FLASH_LENGTH __ospi1_cs0_zero_nocache +0 { ; section.ospi1_cs0.zero_nocache + *(.ospi1_cs0_nocache) *(.bss.ospi1_cs0_nocache) } ; Execution region required to end align __ospi1_cs0_zero_nocache on ac6 @@ -527,6 +567,7 @@ LOAD_REGION_FLASH FLASH_START NOCOMPRESS FLASH_LENGTH __ospi1_cs0_noinit +0 UNINIT { ; section.ospi1_cs0.noinit + *(.ospi1_cs0_noinit) *(.bss.ospi1_cs0_noinit) } @@ -534,6 +575,7 @@ LOAD_REGION_FLASH FLASH_START NOCOMPRESS FLASH_LENGTH __ospi1_cs0_zero +0 { ; section.ospi1_cs0.zero + *(.ospi1_cs0) *(.bss.ospi1_cs0) } @@ -559,6 +601,7 @@ LOAD_REGION_FLASH FLASH_START NOCOMPRESS FLASH_LENGTH __itcm_noinit +0 UNINIT { ; section.itcm.noinit + *(.itcm_noinit) *(.bss.itcm_noinit) } @@ -566,6 +609,7 @@ LOAD_REGION_FLASH FLASH_START NOCOMPRESS FLASH_LENGTH __itcm_zero +0 { ; section.itcm.zero + *(.itcm) *(.bss.itcm) } @@ -591,6 +635,7 @@ LOAD_REGION_FLASH FLASH_START NOCOMPRESS FLASH_LENGTH __dtcm_noinit +0 UNINIT { ; section.dtcm.noinit + *(.dtcm_noinit) *(.bss.dtcm_noinit) } @@ -598,6 +643,7 @@ LOAD_REGION_FLASH FLASH_START NOCOMPRESS FLASH_LENGTH __dtcm_zero +0 { ; section.dtcm.zero + *(.dtcm) *(.bss.dtcm) } @@ -625,6 +671,7 @@ LOAD_REGION_FLASH FLASH_START NOCOMPRESS FLASH_LENGTH __ram_noinit_nocache AlignExpr(+0, 32) UNINIT { ; section.ram.noinit_nocache + *(.ram_noinit_nocache) *(.bss.ram_noinit_nocache) } @@ -632,6 +679,7 @@ LOAD_REGION_FLASH FLASH_START NOCOMPRESS FLASH_LENGTH __ram_zero_nocache +0 { ; section.ram.zero_nocache + *(.ram_nocache) *(.bss.ram_nocache) } ; Execution region required to end align __ram_zero_nocache on ac6 @@ -656,7 +704,9 @@ LOAD_REGION_FLASH FLASH_START NOCOMPRESS FLASH_LENGTH { ; *(.bss.g_main_stack) *(.bss.g_main_stack) + *(.ram_noinit) *(.bss.ram_noinit) + *(.noinit) *(.bss.noinit) } @@ -664,6 +714,7 @@ LOAD_REGION_FLASH FLASH_START NOCOMPRESS FLASH_LENGTH __ram_zero +0 { ; section.ram.zero + *(.ram) *(.bss.ram) .ANY(+ZI ) } @@ -671,6 +722,7 @@ LOAD_REGION_FLASH FLASH_START NOCOMPRESS FLASH_LENGTH ; Thread Stacks __ram_thread_stack AlignExpr(+0, 8) UNINIT { + *(.stack?*) *(.bss.stack?*) } @@ -686,6 +738,7 @@ LOAD_REGION_FLASH FLASH_START NOCOMPRESS FLASH_LENGTH { } + RAM_END +0 UNINIT EMPTY 0 {} __RAM_end +0 EMPTY 0 {} SCatterAssert( (LoadBase(__RAM_end) - LoadBase(__RAM_start)) <= RAM_LENGTH ) } ; create a root region after the RAM init ERs for remainder of ROM ERs diff --git a/bsp/renesas/ra8p1-titan-board/template.uvprojx b/bsp/renesas/ra8p1-titan-board/template.uvprojx index 3a4dd2203ee..84bb782d048 100644 --- a/bsp/renesas/ra8p1-titan-board/template.uvprojx +++ b/bsp/renesas/ra8p1-titan-board/template.uvprojx @@ -376,7 +376,7 @@ - + 6319,6314